DC/DC power management systems generally regulate DC power supplied from a battery at a particular voltage/current by conditioning the output voltage and current to levels that are appropriate for a particular circuit. It is also desirable to extend the battery life of mobile platforms by using the power management device to selectively turning off a given circuit during time intervals when its functions are not absolutely needed by the larger system it serves. Since most mobile electronic systems will comprise a plurality of circuits that each operate at a variety of voltage and current levels different from those supplied by the battery, a plurality of DC/DC power management systems are required to assure each distinct circuit is operating with well conditioned power. The overall system's power efficiency is optimized and costs are minimized by using low loss DC/DC power management modules that are fully integrated at the semiconductor wafer scale.
Depending upon the power levels required, DC/DC power management systems may be configured in various control topologies: buck, boost, buck-boost, Luo (positive and negative type), Ca, transformer-type (forward, fly-back, zeta), and super-lift (positive, negative, positive push-pull, negative push-pull, double/enhanced circuit), among others. Common features to all these systems include: one or more passive components (resistor or capacitor), at least one power switch, at least one diode, and either at least one inductor coil, transformer coil, or both. (See FIG. 1). As explained below, the discrete assembly of these individual components is an obstacle to increasing power density, reducing form factor (size), lowering cost, improving reliability, and improving power efficiency. It is therefore the principal aim of the present invention to improve these system parameters by eliminating any and all discretely assembled components from the fabrication process. It is herein understood that this invention applies to all DC/DC power management systems, irrespective of the control topology or circuit application.
Electrical loss and electromagnetic interference (“EMI”) are the leading obstacles to achieving high efficiency, low form factor, high-speed power management systems. Inductor/transformer coils are usually the largest component of the DC/DC converter systems and the principal cause of electrical loss and EMI. Technologies that have the potential to drive power management circuits at higher switching speeds will reduce the inductor/transformer coil's required inductance and, therefore, lower the coil's size. Large EMI is undesirable because it can destabilize circuit settling times. EMI is largely a property of specific coil designs that do not form a closed path for their magnetic current. EMI is also generated by magnetic flux creep and proximity losses, which are also intrinsic qualities of the coil's design.
Often, high permeability magnetic core materials are used to reduce coil size. Although ceramics have lower permeability than magnetic metal permalloys, ceramic cores are preferred because they provide higher electrical resistance. The higher resistance allows the coil and the converter circuit to be driven at higher switching speeds, since it minimizes eddy current losses within the magnetic core. Eddy current loss is quantified as:PLoss=Ieddy2·RE  (1)A higher loss adds an additional system constraint, as the lost power is converted into heat, which must be managed to maintain stable performance of the modulating power switch. Magnetic component core loss is the primary obstacle to achieving acceptable transformer efficiencies (≧90%) in high speed, high power switched mode power supplies (“SMPS”), because they increase as the square of the operating frequency. A 10-fold increase in the switching frequency results in 100-fold increase in eddy current power loss.
Eddy current loss in the magnetic core also imposes a practical limit on switching speed and circuit form factor. As a result, transformer coils are often designed to handle smaller magnetic flux swings (lower power) at higher frequencies to avoid excessive loss. For the reasons cited above, magnetic core losses in commercial ferrite ceramics currently limit power management module switching frequencies to values between 5-10 MHz.
Eddy current losses also impose limits on overall power thresholds because they will vary as the square of the pulsed voltage amplitude, Vp, in which case the loss is given as:
                              Eddy          ⁢                                          ⁢          current          ⁢                                          ⁢          loss                =                                            V              p              2                                      R              E                                ·                                    t              p                        T                                              (        2        )            Where RE, is the ac resistance experienced by eddy currents circulating in the magnetic core, and tp is the width of the pulse that keeps the switch in its “on” or “closed” mode, and T is the time period of the switch duty cycle. Since higher switching speeds enable the use of circuit components with smaller inductance values and further power management module miniaturization, it is therefore desirable to minimize magnetic core loss to the greatest extent possible.
1. Description of the Prior Art.
Hopper et al., U.S. Pat. No. 7,652,348 B1, “APPARATUS & METHOD FOR WAFER LEVEL FABRICATION OF HIGH VALUE INDUCTORS ON SEMICONDUCTOR IC's”, issued Jan. 1, 26, 2010, (Hopper et al. '348) teach the assembly of inductor coils on semiconductor wafers containing active devices buried beneath the wafer surface using high permeability magnetic core material prepared from powder pastes, but does not instruct methods enable a low-loss magnetic core that operates at switching frequencies above 10 MHz.
Ou, U.S. Ser. No. 10/236,700, “INDUCTOR FORMED ON A SILICON SUBSTRATE AND METHOD OF MANUFACTURING THE SAME”, filed Sep. 5, 2002 and published Jul. 3, 2003 as 20030122647 teaches the integration of inductor coils using methods that are compatible with CMOS semiconductor processes, but does not disclose means to introduce high-permeability magnetic core material to miniaturize the formed inductor coil.
Ewing et al., U.S. Ser. No. 12/344,419, “POWER DISTRIBUTION, MANAGEMENT, AND MONITORING SYSTEMS AND METHODS”, filed Dec. 26, 2008, and published Sep. 17, 2009 as 20090234512 discloses the discrete assembly of power management system that contain toroidal inductor coils.
Evans et al., U.S. Pat. No. 5,543,773. “TRANSFORMERS AND COUPLED INDUCTORS WITH OPTIMUM INTERLEAVING”, issued Aug. 6, 1996, discloses the discrete assembly of toroidal inductor and transformer coils on a printed circuit board with optimal interleaving to minimize flux leakage and proximity losses as shown in FIG. 2.
2. Definition of Terms
The term “active component” is herein understood to refer to its conventional definition as an element of an electrical circuit that that does require electrical power to operate and is capable of producing power gain.
The term “amorphous material” is herein understood to mean a material that does not comprise a periodic lattice of atomic elements, or lacks mid-range (over distances of 10's of nanometers) to long-range crystalline order (over distances of 100's of nanometers).
The terms “chemical complexity”, “compositional complexity”, “chemically complex”, or “compositionally complex” are herein understood to refer to a material, such as a metal or superalloy, compound semiconductor, or ceramic that consists of three (3) or more elements from the periodic table.
The terms “discrete assembly” or “discretely assembled” is herein understood to mean the serial construction of an embodiment through the assembly of a plurality of pre-fabricated components that individually comprise a discrete element of the final assembly.
The term “emf” is herein understood to mean its conventional definition as being an electromotive force.
The term “integrated circuit” is herein understood to mean a semiconductor chip into which at least one transistor element has been embedded.
The term “LCD” is herein understood to mean a method that uses liquid precursor solutions to fabricate materials of arbitrary compositional or chemical complexity as an amorphous laminate or free-standing body or as a crystalline laminate or free-standing body that has atomic-scale chemical uniformity and a microstructure that is controllable down to nanoscale dimensions.
The term “liquid precursor solution” is herein understood to mean a solution of hydrocarbon molecules that also contains soluble metalorganic compounds that may or may not be organic acid salts of the hydrocarbon molecules into which they are dissolved.
The term “microstructure” is herein understood to define the elemental composition and physical size of crystalline grains forming a material substance.
The term “MISFET” is herein understood to mean its conventional definition by referencing a metal-insulator-semiconductor field effect transistor.
The term “mismatched materials” is herein understood to define two materials that have dissimilar crystalline lattice structure, or lattice constants that differ by 5% or more, and/or thermal coefficients of expansion that differ by 10% or more.
The term “MOSFET” is herein understood to mean its conventional definition by referencing a metal-oxide-silicon field effect transistor.
The term “nanoscale” is herein understood to define physical dimensions measured in lengths ranging from 1 nanometer (nm) to 100's of nanometers (nm).
The term “passive component” is herein understood to refer to its conventional definition as an element of an electrical circuit that that does not require electrical power to operate and is not capable of producing power gain.
The term “standard operating temperatures” is herein understood to mean the range of temperatures between −40° C. and +125° C.
The terms “tight tolerance” or “critical tolerance” are herein understood to mean a performance value, such as a capacitance, inductance, or resistance, that varies less than ±1% over standard operating temperatures.
In view of the above discussion, it would be beneficial to have higher efficiency, higher reliability, lower form factor, lower cost DC/DC power management devices that are enabled by integrating all the devices' electrical components as materials formed at the wafer scale on the surface of a semiconductor chip.